It has been reported that Samsung has created an internal professional team for the development of the 4F² DRAM storage unit structure. As compared to the 6F² DRAM storage unit structure, the chip of the latest structure can be reduced by up to 30% without even changing the manufacturing process of the same. A report by The Elec suggested that the original F4 square is a cell structure technology. In addition, the DRAM industry also tried to commercialize it as early as 10 years, but the project was not successful.
Currently, Samsung has deployed a professional team for the development of 4F² DRAM storage unit structure wafers. The transistors of the new structure will form source (S), gate (G), and drain (D) as per the direction of current inflow and outflow, along with other complete systems.
In terms of setup, the device structure has a capacitor installed for storing charge above the drain (D), and the transistor is in contact with the horizontally arranged WL line and the vertically arranged BL line. Amidst all of that, WL is said to be connected with the gate (G), which is responsible for the opening and closing of the transistor. The BL is further connected to the source (S), which has the duty of reading and writing the data.
Further details regarding the 4F² DRAM storage unit structure have not been revealed until now. Expectations are that we will get to know more about the same as soon as there is some substantial evidence. One thing which we are sure of is that the technology can be used for the purpose of making the processors more powerful as compared to the ones based on the 6F² DRAM storage unit structure.
